MCGenjin MultiMapper
Posted: Fri Oct 14, 2011 2:10 pm
Hi, I've started working with the PCE and made a multiregion memory mapper.
You get up to 8MB of banked ROM and can switch the order of the datalines whenever you like. Two chipselects are also given for whatever use your imagination can come up with. Everything fits in a single EPM7032LC44 CPLD, but the VHDL source is given for anyone wanting to use a different CPLD or add features.
Documentation, source, POFs, etc. is all available here:
http://www.penguinet.net/TailChao/Hardw ... /index.php
Enjoy.
You get up to 8MB of banked ROM and can switch the order of the datalines whenever you like. Two chipselects are also given for whatever use your imagination can come up with. Everything fits in a single EPM7032LC44 CPLD, but the VHDL source is given for anyone wanting to use a different CPLD or add features.
Documentation, source, POFs, etc. is all available here:
http://www.penguinet.net/TailChao/Hardw ... /index.php
Enjoy.